Evolution of the multi-core processor architecture Intel Core: Conroe, Kentsfield...
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Date: 27.06.2006 |
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Intel Smart Memory Access
The Intel Smart Memory Access technology allows boosting the system performance through optimization of data exchanged with the memory subsystem, thus reducing the latency in accessing the memory.
There is also an absolutely new feature implemented during the development of the Intel Smart Memory Access technology called Memory Disambiguation. The Memory Disambiguation feature allows increasing the efficiency of out-of-order data processing through providing the cores with speculative data fetching in executing instructions - long before a number of pre-queued instructions are executed.
 Normally, when the out-of-order processor reorders instructions, it can't transpose Load to Store because these is no information on the position of respective data yet. Use of the Memory Disambiguation principle allows eliminating ambiguities with special algorithms which determine if a Load command can be executed prior to the preceding Store. If the result is positive, the queue may be rearranged for a better parallelization of the instruction handling process. In those rare occasions when it is impossible the technology locates the conflict, reloads correct data and repeats executing an instruction.
Along with the Memory Disambiguation, the Intel Smart Memory Access technology includes improved prefetch units which are able "predicting" the memory contents and determining if the data placed in the cache can be used once needed. Of course, increase in the number of loads out of the cache versus fetching from the system memory has a positive effect on reducing the latency and improving the performance.
The Intel Core architecture implies using two prefetch units per each L1 cache and two per L2 cache. These caches detect the threads and jointly distribute access, which allows for timely placement of data in the L1 cache. The L2 cache prefetchers analyze calls from the cores and provide the L2 cache with data which may be of use to the cores in future.
Intel Advanced Digital Media Boost
The Intel Advanced Digital Media Boost feature improves the CPU performance during execution of SSE instructions. Both classes of operations - 128-bit integer arithmetic SIMD, and 128-bit floating point double-precision SIMD - are meant to reduce the total number of instructions required to execute specific program tasks, they are able boosting many applications to do with video and photo processing, speech recognition, encryption, financial and scientific calculations.
In many processors of the previous generations, processing each 128-bit SSE, SSE2, and SSE3 instruction is regarded as an instruction executed in two cycles. Due to the Intel Advanced Digital Media Boost technology, execution of such 128-bit instructions becomes possible at the peak speed in one cycle. The use of Intel Advanced Digital Media Boost is especially effective for processing multimedia content like graphics, video, audio, and other data that makes intensive use of SSE, SSE2, and SSE3.
Summing up. Future prospects for the Intel Core micro architectureThis is in brief a whole overview of major improvements implemented in the new Intel Core micro architecture with multicore optimization. As you can see, each of these technologies separately is able substantially improving the CPU efficiency. Taken as a whole, they appear to be a serious force in setting new performance standards in combination with economical power consumption.
Therefore, the new Intel Core micro architecture has made use of all the advantages already implemented in the first generations of mobile Intel Pentium M processors, inherited the best of the Intel NetBurst architecture, and has been enriched by the most fresh innovative ideas of developers.
Today, we are not talking about a specific performance of the Intel Core architecture. The time has not yet come. However, the fact that Intel will use Intel Core in all the key sectors of computing equipment – servers, desktop, and mobile systems - means the company has put so much at stake. Judging by various indirect evidence, we can make precise enough conclusions that the stake is indeed worth it, but… let's not talk about that today and wait for the announcement and results of laboratory tests.
Reminding it once again that the Intel Core architecture will be implemented in specific retail products for various market sectors already in the second half of 2006. Processors with the working name Conroe for the desktop PC market are expected to emerge earlier than the others. Evidently, the new-generation economical chips will let system integrators start developing a new generation of quiet, thin and powerful PCs in absolutely unexpected form factors.
As regards the most immediate future, the next generation of chips built on the Intel Core architecture with even greater number of cores is looming out there on the horizon. In particular, Kentsfield, Intel's first 4-core processor for the sector of most powerful desktop PCs, based on the Intel Core architecture with outstanding power efficiency indices will be the processor for desktop PCs. Launch of deliveries of these processors is planned for the first quarter of 2007.
At that, I am parting hopefully for not long, because we are in for really grandiose events...
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