Asus P4S800D-E (SiS 655TX) Motherboard Review
Expansion options
The is a SiS 180 four-channel IDE RAID controller onboard.
We first came across this chip on the reference board SiS 648FX. But it was used there solely for the implementation of the SerialATA. On the Asus P4S800D-E, the functions of SiS 180 have been implemented "to the full": two channels are put aside for plugging in ParallelATA disks, with two more channels for the SerialATA. Therefore, the user can set up RAID arrays of levels 0, 1 and 0+1, and JBOD as well. Also note the positioning of additional IDE connectors orientated in parallel to the board's plane.
Besides, the board supports two more SerialATA channels using the functions of the SiS964 south bridge. It also supports merging disks into a RAID array (levels 0 and 1). In the end, up to 12 hard disks altogether can be plugged in to the board: 8 disks through the Parallel-ATA, with 4 more through the SerialATA.
Another important advantage of the south bridge SiS964 is the number of USB 2.0 ports increased to eight. In particular, four ports are on the rear panel of the P4S800D-E, with 4 more plugged in via headers (the board comes bundled with one header for 2 ports).
As regards the Firewire bus, we had to install an additional VT6307 controller made by VIA to provide its support on the board. As a result, the board supports two IEEE1394 ports, one of which mounted on the rear panel, with the other one connected with a header (put in the package bundle).
The board also offers an integrated Marvell 88E8001 Gigabit Ethernet LAN controller. But the data from the chip is transmitted via the PCI bus, while on the i865PEi875P chipsets there is a dedicated CSA bus (Communication Streaming Architecture) which allows transmitting data from the network controller directly to the memory passing over the PCI bus.
And lastly, - the Asus P4S800D-E board offers integrated 6-channel audio based on the AD1888 codec made by Analog Devices.
Now take a look at the board's rear panel.
You can see a lack of one COM port which is implemented as a header (missing in the bundle, unfortunately). The GAME port is implemented in a similar way, but the header is put in the bundle :).
Here is the traditional layout of the board:
There are five jumpers onboard: the CLRTC1 positioned near the battery and is meant for clearing the CMOS settings; the USBPW12,USBPW34,USBPW56,USBPW78 are meant to wake up on keyboard pulse coming from USB devices.
Now on to the BIOS settings.
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